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Uncover the secrets and techniques behind profitable IP growth as we delve into modern design methods. Learn to navigate the intricate stability between energy effectivity and excessive efficiency. Sharad Bhowmick and Nidhi Agarwal from Electronics For You spoke to Dr Arun Ashok and Rijin John, Co-founders, Silizium Circuits and obtained some very fascinating particulars…
Q. How does Silizium Circuits contribute to IP growth?
A. Sure, we create one thing known as ‘onerous IPs.’ These are like small, vital components inside digital units, sort of like tiny chips inside a much bigger chip. Think about opening up your digital gadget and seeing many tiny chips working collectively to make it operate. Corporations like Intel, Renesas, or Infineon wish to make their very own chips, however stringent time to market necessitates extra cooperation and collaboration. So, they search companions like us who can present these vital components, or IPs, to assist them construct their chips quicker and higher. This protects them money and time.
(L to R) Rijin John and Dr Arun Ashok, Co-founders
We’re an Indian firm, producing IPs that different firms can use of their merchandise. We give them a graphic knowledge system (GDS) file with all the mandatory design particulars. It’s a confidential file completely for his or her use, safeguarding our IPs. There are two varieties of IPs: one resembling the tiny digital components talked about earlier, and the opposite is a particular code known as RTL logic. We provide each to help firms in expediting their product growth extra effectively.
Q. What instruments and strategies do you utilize to create onerous IPs?
A. In our chip and IP design firm, the applied sciences we use are linked to the foundry nodes that we collaborate with. Foundry nodes decide the smallest dimensions of constructions inside a chip. Our main focus lies in analogue and RF applied sciences, starting from 65 nanometres and upwards. We will work with nodes like 65nm, 130nm, and 180nm. We’ve agreements with varied foundries enabling us to supply objects utilizing these nodes. Nonetheless, when creating IP for purchasers, it should align with the know-how they use. Whereas we have interaction with nodes from 65nm and above for our in-house tasks, we will additionally develop IP for purchasers utilizing smaller nodes like 22nm or 28nm, based mostly on their necessities.
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