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Synopsys added to the thrill of occasions in Silicon Valley this week with the announcement of recent AI-driven EDA instruments, and the acquisition of SRAM PUF safety IP agency Intrinsic ID.
In his opening keynote speech on the Synopsys Consumer Group (SNUG) 2024 convention in Santa Clara, Calif., Synopsys president and CEO Sassine Ghazi talked in regards to the rising complexity of silicon, the blurred line between silicon and programs, and the way AI-driven EDA instruments can tackle the ensuing productiveness bottleneck.
“The fast development of AI, silicon proliferation, and software-defined programs are driving the period of pervasive intelligence, the place expertise is seamlessly built-in into our lives, bringing with it unprecedented alternative and larger compute, vitality, and design challenges for the expertise {industry},” Ghazi stated.
Capturing the thrill already within the air throughout Nvidia’s GTC 2024 convention occurring only a few miles away in San Jose, Ghazi invited Nvidia founder and CEO Jensen Huang on stage to re-enforce the message that AI instruments like co-pilots can assist the system-development course of to ship on the rising demand for AI.
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In a video interview with EE Occasions, Ghazi summarizes the bulletins and the {industry} challenges.
The brand new product bulletins included a brand new device, 3DSO.ai, for multi-die design area optimization, and architectural exploration; and two new hardware-assisted verification (HAV) options for sooner, greater capability emulation and prototyping.
For multi-die exploration, the brand new 3DSO.ai is constructed natively into Synopsys 3DIC Compiler—a unified exploration-to-signoff platform and powered by quick built-in evaluation engines—providing optimization for sign integrity, thermal integrity and power-network design.
Ghazi additionally highlighted Synopsys’ industry-first resolution for early structure exploration of multi-die programs: the Synopsys Platform Architect, Multi-Die. This, the corporate stated, accelerates design timelines, delivering a dramatic 6-12 month “shift left” from RTL for the evaluation of efficiency and energy, whereas accounting for the interdependencies between a number of dies. It permits programs architects to automate modeling, simulation, and evaluation for early partitioning selections, and helps clients keep away from pricey, late-stage adjustments and respins.
On hardware-assisted verification, Ghazi defined that as AI turns into pervasive, software program performs a a lot bigger position in semiconductor design—demanding a holistic programs strategy to silicon innovation. The complexity and software-defined nature of at the moment’s designs requires verification programs with greater efficiency and larger capability. On this context, Synopsys unveiled two new HAV options: ZeBu EP2 and HAPS-100 12.
Synopsys ZeBu EP2, the most recent model within the Synopsys ZeBu EP household of unified emulation and prototyping programs, offers the quickest emulation and prototyping platform for AI workloads, making it best for software program bring-up, software program/{hardware} validation, and energy/efficiency evaluation.
The second is Synopsys HAPS-100 12 system, which Ghazi stated is Synopsys’ highest capability and density FPGA-based prototyping system, with a mixture of mounted and versatile interconnects and a rack-friendly design. That is notably helpful for prototyping large designs that require many FPGAs, reminiscent of multi-die programs and huge SoCs. Out there now, this new prototyping system shares a typical {hardware} platform with Synopsys ZeBu EP2.
Intrinsic ID acquisition
Together with its new instruments bulletins, Synopsys additionally introduced that it accomplished the acquisition of Intrinsic ID, a supplier of bodily unclonable perform (PUF) IP used within the design of SoCs.
Synopsys didn’t say a lot in regards to the acquisition aside from the truth that it provides “manufacturing confirmed PUF IP to Synopsys” semiconductor IP portfolio, enabling SoC designers worldwide to guard their SoCs by producing a singular identifier on chip using the inherent and distinctive traits of each silicon chip. Synopsys’ Ghazi instructed EE Occasions that that they had been liaising with the corporate for some time.
Intrinsic ID was fashioned in 2008 as a spinout of Philips Analysis, the place the founders of Intrinsic ID have been conducting analysis on safety for ambient intelligence, after which declare to have pioneered the usage of bodily unclonable capabilities (PUFs) for safety and authentication purposes in embedded programs and the web of issues (IoT).
Within the press launch asserting the acquisition, Synopsys’ common supervisor of the options group stated, “In our more and more linked world, chip designers are integrating PUF expertise of their SoCs for a lot of purposes, together with identification and the creation of a product ID for observe and hint. The acquisition of Intrinsic ID enhances our in depth semiconductor IP portfolio, additional serving to designers create SoCs which are on the coronary heart of at the moment’s good and linked units. We look ahead to increasing our R&D presence within the Netherlands with Intrinsic ID’s group and establishing a middle of excellence for PUF expertise in Eindhoven.”
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